In the rate-distortion optimization (RDO), the process of choosing the best prediction mode is performed through exhaustive\r\nexecutions of the whole encoding process, increasing significantly the encoder computational complexity. Considering H.264/AVC\r\nintra frame prediction, there are several modes to encode a macroblock (MB). This work proposes an algorithm and the hardware\r\ndesign for a fast intra frame mode decision module for H.264/AVC encoders. The application of the proposed algorithm reduces in\r\nmore than 10 times the number of encoding iterations for choosing the best intramode when compared with RDO-based decision.\r\nThe architecture was synthesized to FPGA and achieved an operation frequency of 98MHz processing more than 300 HD1080p\r\nframes per second. With this approach, we achieved one order-of-magnitude performance improvement compared with RDObased\r\napproaches, which is very important not only from the performance but also from the energy consumption perspective for\r\nbattery-operated devices. In order to compare the architecture with previously published works, we also synthesized it to standard\r\ncells. Compared with the best previous results reported, the implemented architecture achieves a complexity reduction of five\r\ntimes, a processing capability increase of 14 times, and a reduction in the number of clock cycles per MB of 11 times.
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